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28-letter words containing s, i, d

  • disability rights commission — (in Britain) a body appointed by the Government to enforce anti-discrimination law affecting people with disabilities
  • discretionary service charge — A discretionary service charge is an amount that is added to your bill in a restaurant to pay for the work of the person who comes and serves you. You can decide if you want to pay it.
  • distinguished encoding rules — (communications, data)   (DER) An X.690 encoding format (or transfer syntax) for data structures described by ASN.1 that specifies exactly one way to encode a value thus ensuring a unique, canonical, serialised representation. DER is a restricted variant of BER. For example, DER has exactly one way to encode a Boolean value. DER is used in cryptography, e.g. for digital certificates such as X.509.
  • dos protected mode interface — (DPMI) The method which Microsoft prescribes for a DOS program to access extended memory under a multitasking environment, e.g. Microsoft Windows. This service is provided by the HIMEM.SYS driver on IBM PCs. The DPMI specification was finalized in 1990. The specification itself is available from Intel Literature Sales. VCPI (Virtual Control Program Interface), which was an alternative, and incompatible method for doing the same thing.
  • dow jones industrial average — a stock market index based upon the current prices of thirty selected industrial stocks traded on the New York Stock Exchange
  • drink yourself into a stupor — If you drink yourself into a stupor or drink yourself into oblivion, you drink so much alcohol that you lose consciousness or fall deeply asleep.
  • drive someone to distraction — If you say that something or someone drives you to distraction, you are emphasizing that they annoy you a great deal.
  • dulles international airport — airport in N Virginia, just west of Washington, D.C., used mainly for international flights.
  • dynamic random-access memory — (storage)   (DRAM) A type of semiconductor memory in which the information is stored in capacitors on a MOS integrated circuit. Typically each bit is stored as an amount of electrical charge in a storage cell consisting of a capacitor and a transistor. Due to leakage the capacitor discharges gradually and the memory cell loses the information. Therefore, to preserve the information, the memory has to be refreshed periodically. Despite this inconvenience, the DRAM is a very popular memory technology because of its high density and consequent low price. The first commercially available DRAM chip was the Intel 1103, introduced in 1970. Early DRAM chips, containing up to a 16k x 1 (16384 locations of one bit each), needed 3 supply voltages (+5V, -5V and +12V). Beginning with the 64 kilobit chips, charge pumps were included on-chip to create the necessary supply voltages out of a single +5V supply. This was necessary to fit the device into a 16-pin DIL package, which was the preferred package at the time, and also made them easier to use. To reduce the pin count, thereby helping miniaturisation, DRAMs generally had a single data line which meant that a computer with an N bit wide data bus needed a "bank" of (at least) N DRAM chips. In a bank, the address and control signals of all chips were common and the data line of each chip was connected to one of the data bus lines. Beginning with the 256 kilobit DRAM, a tendency toward surface mount packaging arose and DRAMs with more than one data line appeared (e.g. 64k x 4), reducing the number of chips per bank. This trend has continued and DRAM chips with up to 36 data lines are available today. Furthermore, together with surface mount packages, memory manufacturers began to offer memory modules, where a bank of memory chips was preassembled on a little printed circuit board (SIP = Single Inline Pin Module, SIMM = Single Inline Memory Module, DIMM = Dual Inline Memory Module). Today, this is the preferred way to buy memory for workstations and personal computers. DRAM bit cells are arranged on a chip in a grid of rows and columns where the number of rows and columns are usually a power of two. Often, but not always, the number of rows and columns is the same. A one megabit device would then have 1024 x 1024 memory cells. A single memory cell can be selected by a 10-bit row address and a 10-bit column address. To access a memory cell, one entire row of cells is selected and its contents are transferred into an on-chip buffer. This discharges the storage capacitors in the bit cells. The desired bits are then read or written in the buffer. The (possibly altered) information is finally written back into the selected row, thereby refreshing all bits (recharging the capacitors) in the row. To prevent data loss, all bit cells in the memory need to be refreshed periodically. This can be done by reading all rows in regular intervals. Most DRAMs since 1970 have been specified such that one of the rows needs to be refreshed at least every 15.625 microseconds. For a device with 1024 rows, a complete refresh of all rows would then take up to 16 ms; in other words, each cell is guaranteed to hold the data for 16 ms without refresh. Devices with more rows have accordingly longer retention times. Many varieties of DRAM exist today. They differ in the way they are interfaced to the system - the structure of the memory cell itself is essentially the same. "Traditional" DRAMs have multiplexed address lines and separate data inputs and outputs. There are three control signals: RAS\ (row address strobe), CAS\ (column address strobe), and WE\ (write enable) (the backslash indicates an active low signal). Memory access procedes as follows: 1. The control signals initially all being inactive (high), a memory cycle is started with the row address applied to the address inputs and a falling edge of RAS\ . This latches the row address and "opens" the row, transferring the data in the row to the buffer. The row address can then be removed from the address inputs since it is latched on-chip. 2. With RAS\ still active, the column address is applied to the address pins and CAS\ is made active as well. This selects the desired bit or bits in the row which subsequently appear at the data output(s). By additionally activating WE\ the data applied to the data inputs can be written into the selected location in the buffer. 3. Deactivating CAS\ disables the data input and output again. 4. Deactivating RAS\ causes the data in the buffer to be written back into the memory array. Certain timing rules must be obeyed to guarantee reliable operation. 1. RAS\ must remain inactivate for a while before the next memory cycle is started to provide sufficient time for the storage capacitors to charge (Precharge Time). 2. It takes some time from the falling edge of the RAS\ or CAS\ signals until the data appears at the data output. This is specified as the Row Access Time and the Column Access Time. Current DRAM's have Row Access Times of 50-100 ns and Column Access Times of 15-40 ns. Speed grades usually refer to the former, more important figure. Note that the Memory Cycle Time, which is the minimum time from the beginning of one access to the beginning of the next, is longer than the Row Access Time (because of the Precharge Time). Multiplexing the address pins saves pins on the chip, but usually requires additional logic in the system to properly generate the address and control signals, not to mention further logic for refresh. Therefore, DRAM chips are usually preferred when (because of the required memory size) the additional cost for the control logic is outweighed by the lower price. Based on these principles, chip designers have developed many varieties to improve performance or ease system integration of DRAMs: PSRAMs (Pseudo Static Random Access Memory) are essentially DRAMs with a built-in address multiplexor and refresh controller. This saves some system logic and makes the device look like a normal SRAM. This has been popular as a lower cost alternative for SRAM in embedded systems. It is not a complete SRAM substitute because it is sometimes busy when doing self-refresh, which can be tedious. Static Column DRAM is similar to Page Mode DRAM, but to access different bits in the open row, only the column address needs to be changed while the CAS\ signal stays active. The row buffer essentially behaves like SRAM. DRAM used for Video RAM (VRAM) has an additional long shift register that can be loaded from the row buffer. The shift register can be regarded as a second interface to the memory that can be operated in parallel to the normal interface. This is especially useful in frame buffers for CRT displays. These frame buffers generate a serial data stream that is sent to the CRT to modulate the electron beam. By using the shift register in the VRAM to generate this stream, the memory is available to the computer through the normal interface most of the time for updating the display data, thereby speeding up display data manipulations. SDRAM (Synchronous DRAM) adds a separate clock signal to the control signals. It allows more complex state machines on the chip and high speed "burst" accesses that clock a series of successive bits out (similar to the nibble mode). CDRAM (Cached DRAM) adds a separate static RAM array used for caching. It essentially combines main memory and cache memory in a single chip. The cache memory controller needs to be added externally. RDRAM (Rambus DRAM) changes the system interface of DRAM completely. A byte-wide bus is used for address, data and command transfers. The bus operates at very high speed: 500 million transfers per second. The chip operates synchronously with a 250MHz clock. Data is transferred at both rising and falling edges of the clock. A system with signals at such frequencies must be very carefully designed, and the signals on the Rambus Channel use nonstandard signal levels, making it incompatible with standard system logic. These disadvantages are compensated by a very fast data transfer, especially for burst accesses to a block of successive locations. A number of different refresh modes can be included in some of the above device varieties: RAS\ only refresh: a row is refreshed by an ordinary read access without asserting CAS\. The data output remains disabled. CAS\ before RAS\ refresh: the device has a built-in counter for the refresh row address. By activating CAS\ before activating RAS\, this counter is selected to supply the row address instead of the address inputs. Self-Refresh: The device is able to generate refresh cycles internally. No external control signal transitions other than those for bringing the device into self-refresh mode are needed to maintain data integrity.
  • electronic design automation — (application)   (EDA) Software tools for the development of integrated circuits and systems. Companies selling EDA tools include Cadence, Intergraph, Mentor, Synopsys, Viewlogic. Zuken-Redac Dazix has been acquired by Intergraph.
  • electronic transfer of funds — the transfer of money from one bank or building-society account to another by means of a computer link using the telephone network
  • english as a second language — subject: English for non-native speakers
  • external data representation — (XDR) A standard for machine independent data structures developed by Sun Microsystems for use in remote procedure call systems. It is defined in RFC 1014 and is similar to ASN.1.
  • favourable pressure gradient — a decrease of pressure in the direction of flow
  • fifth dimension technologies — (company, virtual reality)   (5DT) Manufacturers of the 5th Glove.
  • food and drug administration — a division of the Department of Health and Human Services that protects the public against impure and unsafe foods, drugs, and cosmetics. Abbreviation: FDA.
  • for all intents and purposes — something that is intended; purpose; design; intention: The original intent of the committee was to raise funds.
  • for one's life/for dear life — If you say that someone does something for dear life or for their life, you mean that they do it using all their strength and effort because they are in a dangerous or urgent situation.
  • formal description technique — (specification, protocol)   (FDT) A formal method for developing telecomunications services and protocols. FDTs range from abstract to implementation-oriented descriptions. All FDTs offer the means for producing unambiguous descriptions of OSI services and protocols in a more precise and comprehensive way than natural language descriptions. They provide a foundation for analysis and verification of a description. The target of analysis and verification may vary from abstract properties to concrete properties. Natural language descriptions remain an essential adjunct to formal description, enabling an unfarmiliar reader to gain rapid insight into the structure and function of services and protocols. Examples of FDTs are LOTOS, Z, SDL, and Estelle.
  • front-end engineering design — Front-end engineering design is early and basic design, to accurately discover what resources will be needed.
  • general packet radio service — (communications)   (GPRS) A GSM data transmission technique that transmits and receives data in packets. This contrasts with systems that set up a persistent channel. GPRS makes very efficient use of available radio spectrum, and users pay only for the volume of data sent and received. See also: packet radio.
  • get/set one's house in order — If someone gets their house in order, puts their house in order, or sets their house in order, they arrange their affairs and solve their problems.
  • give a person his or her due — to give or allow a person what is deserved or right
  • give the nod/give sb the nod — If you give someone the nod, you give them permission to do something.
  • hot standby routing protocol — (protocol)   (HSRP) A CISCO standard, defined in RFC 2281, that calls for a mirrored router in passive mode to send hello packets, wait for a lead router to die and, without dropping a packet, take over from that router. Note: "standby", not "swappable" (and certainly not "swapable").
  • how stupid/lucky can you get — You can say, for example, 'How lucky can you get?' or 'How stupid can you get?' to show your surprise that anyone could be as lucky or stupid as the person that you are talking about.
  • human immunodeficiency virus — See under AIDS virus. Abbreviation: HIV.
  • hydrolysed vegetable protein — a powder or liquid that is produced by boiling legumes or cereals in hydrochloric acid and then neutralizing with sodium hydroxide. It is used as a flavouring in some foods, such as soups and bouillon cubes
  • ieee floating point standard — (standard, mathematics)   (IEEE 754) "IEEE Standard for Binary Floating-Point Arithmetic (ANSI/IEEE Std 754-1985)" or IEC 559: "Binary floating-point arithmetic for microprocessor systems". A standard, used by many CPUs and FPUs, which defines formats for representing floating-point numbers; representations of special values (e.g. infinity, very small values, NaN); five exceptions, when they occur, and what happens when they do occur; four rounding modes; and a set of floating-point operations that will work identically on any conforming system. IEEE 754 specifies formats for representing floating-point values: single-precision (32-bit) is required, double-precision (64-bit) is optional. The standard also mentions that some implementations may include single-extended precision (80-bit) and double-extended precision (128-bit) formats.
  • in (good, poor, etc. ) taste — in a form, style, or manner showing a (good, poor, etc.) sense of beauty, excellence, fitness, propriety, etc.
  • industrial programming, inc. — The company which developed MTOS. E-mail: <[email protected]>. Telephone: +1 (516) 938 6600. Address: 100 Jericho Quadrangle, Jericho, NY 11753, USA.
  • instantaneous sound pressure — sound pressure (def 1).
  • instruction address register — (architecture)   (IAR) The IBM name for program counter. The IAR can be accessed by way of a supervisor call in supervisor state, but cannot be directly addressed in problem state.
  • integrated drive electronics — Advanced Technology Attachment
  • it's a good job/a good thing — If you say it's a good thing that something is the case, you mean that it is fortunate.
  • java servlet development kit — (web)   (JSDK) A suite of software for easing the development of Java servlets.
  • like water off a duck's back — You say that criticism is like water off a duck's back or water off a duck's back to emphasize that it is not having any effect on the person being criticized.
  • lloyd's register of shipping — an annual publication giving details of all ships that have been built according to the various classifications established by this society
  • machine-assisted translation — translation done by a human translator who uses computer software to assist with the translation
  • make one's hair stand on end — any of the numerous fine, usually cylindrical, keratinous filaments growing from the skin of humans and animals; a pilus.
  • marriage guidance counsellor — a person whose job is to give advice given to couples who have problems in their married life
  • medical specialist registrar — a hospital doctor senior to a house officer but junior to a consultant, specializing in medicine
  • meter-kilogram-second-ampere — of or relating to the system of units in which the meter, kilogram, second, and ampere are the principal units of length, mass, time, and electric current. Abbreviation: mksa, MKSA.
  • microsoft foundation classes — (programming)   (MFC) Software structures in C++, the Windows base classes which can respond to messages, make windows, and from which application specific classes can be derived.
  • morpheme structure condition — (in generative phonology) a constraint on the occurrence of sounds or sequences of sounds in the phonological representation of morphemes.
  • multimedia personal computer — (multimedia)   (MPC) A specification published by the Multimedia PC Marketing Council in 1990 to encourage the adoption of a standard multimedia computing platform. In May 1993, the MPC Marketing Council published a new specification called MPC Level 2 Specification as an enhanced multimedia computer standard. The original MPC specification, now also known as the MPC Level 1 Specification, continues in full effect. The appearance of the MPC or MPC2 certification mark on a computer system or upgrade kit indicates that the hardware meets the corresponding (Level 1 or Level 2) MPC Marketing Council specification. Software bearing the Multimedia PC mark has been designed to work on Multimedia PC licensed hardware. By establishing a standard platform, certifying hardware compliance and providing inter-operability between software and hardware for the consumer, the MPC Marketing Council is encouraging widespread use of multimedia applications and hardware.
  • national academy of sciences — a private organization, created by an act of Congress (1863), that furthers science and advises the U.S. government on scientific and technical issues. Abbreviation: N.A.S., NAS.
  • national bureau of standards — National Institute of Standards and Technology
  • national semiconductor 32000 — (processor)   (NS32000) The first of a series of microprocessors from National Semiconductor. The 320xx processors have an interface which allows coprocessors such as FPUs and MMUs to be attached in a chain. The 320xx was the predecessor of the Swordfish processor.
  • new revised standard version — a thorough revision of the Revised Standard Version of the Bible sponsored by the National Council of Churches in the U.S. and published in 1989
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